Click here for the latest news about MMIX Thirty years have passed since the MIX computer was designed, and computer architecture has been converging during those years towards a rather different style of machine. Therefore it is time to replace MIX with a new computer that contains even less saturated fat than its predecessor. Exercise 1. And ouch, the standard subroutine calling convention of MIX is irrevocably based on self-modifying instructions! Decimal arithmetic and self-modifying code were popular in , but they sure have disappeared quickly as machines have gotten bigger and faster.

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CPU General The size of a MIX byte depends on the machine: a byte stores a natural number less than 64 on binary machines, on decimal machines, or any limit between 64 and in general. A machine word in MIX is an integer made of a sign and five bytes. The memory of a MIX computer holds words. Data and instructions are stored in the same memory. Since MIX is an old computer, there are no caches, all memory accesses take the same time. Of these, rA and rX are full words, but the index registers rI In addition, there is a program counter, an rJ register that contains the return address after the last jump, an arithmetic overflow flag, and comparison flags.

There is one instruction per word, and are executed sequentially unless a branch instruction changes the program counter. Byte 3 called I, which must be less than 7, allows indexed mode for any instruction. The resulting M must also fit in two bytes and a sign, or else its value is undefined. Instruction set Most instructions come in series of eight, where the source or destination operand is one of the eight main registers, decided by the low three bits of the opcode C.

The series of instructions like this are as follows: here x is one of A, 1, 2, 3, 4, 5, 6, X, which use the register rA, rI LDx loads the word with address M from memory to the register. LDxN loads the word with address M from the memory to the register but then flips the sign of the register. STx stores the register to memory address M. CMPx compares the value of the register with the word at address M in memory, and sets the comparison flags to the result, indicating equal, less, or greater.

Jxcc is a conditional branch to address M, depending on the value of the register. ENTx loads the immediate or indexed value M into the register. ENNx is the same, but then flips the sign of the register. INCx adds the immediate or indexed value M to the register, putting the destination to the same register.

DECx subtracts M from the register, putting the destination to the same register. Jcc are conditional jumps to address M depending on the comparison flags, where cc a condition code chosen from L less , E equal , G greater , GE less or equal , NE not equal , LE less or equal. For example, JL branches if the register had a lower value than the memory at the last CMPx instruction. STJ stores the rJ register to a memory cell.

All of the above jump instructions put one plus the address of the jump instruction to rJ before jumping, thus rJ contains the return address after a subroutine call. This results in self-modifying code. JSJ is an unconditional jump, but unlike all other jump instructions, it does not modify the rJ register.

MUL multiplies the memory word at address M with the accumulator rA, and puts the high word of the two-word result in rA and the low word in rX. DIV performs a division. The divisor is two words long, the high word and sign is in register rA, the low word is in rX whose sign is ignored.

The divisor is the memory word at address M. The instruction puts the quotient truncated towards zero in rA and the remainder in rX, or an undefined value into both of those registers if the division overflows or if the divisor is zero. SLA and SRA shift the magnitude bytes of the accumulator rA by M bytes to the left or right the most significant bytes are on the left , shifting in zeros from the side.

None of the shift instructions modifies the signs of the registers. MOVE copies several bytes from memory to memory. The word count is F, the first source word is at address M, the first destination word at address rI1. As a side effect, rI1 is incremented by F. NOP does nothing. NUM converts a ten-digit decimal string, one digit per byte, to an unsigned single word integer. The input string is in rA five most significant digits and rX five least significant digits , and the remainder divided by 10 of each byte of the input gives a digit.

The output is in the mantissa bytes of rA, the sign is unchanged. CHAR converts an unsigned single word integer rA to decimal. The output is ten digits, stored in individual bytes of rA and rX, but 30 is added to each digit. Signs are unchanged. These last three instructions ignore the value M. In addition to the above section, MIX has IO instructions, floating-point instructions, and some versions have nonstandard extensions too. Field selection Many instructions can operate on just a field of a word, where a field can be any non-empty range of the six bytes including the sign.

For some instructions, byte F is interpreted as a field specification to choose such a field. The LDx and LDxN instructions extract the specified field of the memory word, and loads only that to the register. The magnitude bytes in the field chosen are shifted to the least significant bytes of the register, the bytes above them filled with zero. If the field specification includes the sign, that is loaded to the sign of the register, otherwise the sign is filled with plus. Similarly, STZ modifies the specified field of the memory word only.

However, the CMPx instructions use F to select the same field both from the register and the memory word, comparing those fields without shifting anything. Other instructions use the byte F for other purposes, the most common of which is distinguishing between sub-instructions with the same opcode. For a fixed register x, in the conditional branches Jxcc, the condition code cc is decided by F.

Opcode 6 multiplexes between the shift instructions. Recall that overflowing an index register or the indexed value M has undefined behavior though, so overflow need not be detected there. As MIX uses sign-magnitude representation, the sign of a zero is defined in all operations, and can be read by field access or shifting, but in practice this rarely matters.

The rules for the sign of a zero in arithmetic operations is as follows. Comparisons and conditional branches ignore the sign of a zero value.

For MUL, both output registers get a plus sign if the sign of the two operands were the same, or a minus sign if they were different. For DIV, the sign of the quotient output is plus if the divisor and the dividend have the same sign, or minus if they have different sign, and the remainder output has the sign of the dividend.

Text input and output can use either column Hollerith punched cards, or a teletype and tape reader. Text input is one character per byte using a custom MIX character code, which defines 55 characters, although some devices may support only some of those characters.

More expensive versions of MIX may use magnetic tape or hard disk for storing larger amounts of data. IO is memory-mapped, reading or writing a block at a time.

IO may happen in the background while the CPU continues executing other instructions. Background output may continue to access the data from memory.

Only one operation per device can run in the background, when you start a second operation for the same device, the CPU will first wait until the previous operation completes. There is no interrupt support though, so the CPU has to poll the IO devices for when the operation is completed. Blocks are fixed size, the block size is determined implicitly by the device. The block is one card 80 characters for card reader and card punch, one line of fixed 70 characters for the teletype, one line of a fixed characters for the printer, and word for tape or disk drives.

Text is represented as five characters per word, one in each byte, sign unused. Devices are identified by a number: the teletype is 19, line printer is 18, Hollerith card reader and card punch are 16 and 17 respectively, magnetic tape drives are numbered IO instructions are: HLT halts the machine, but the operator can continue it with no state changed. For disks, rX gives the sector number. If M 0, a line printer starts on the top of a new page, a disk tries to pre-seek to sector rX, a magnetic tape rewinds to the start of the tape.

If M is positive or negative, a magnetic tape skips M blocks of the tape forwards or -M blocks of the tape backwards. Startup and assembly For startup, a MIX computer loads a single block from the punch card reader or ticker tape. TAOCP defines a text-based executable format for programs, in which memory words are stored as text in decimal numbers. This format can be then loaded with a simple bootstrap program which is on the first two cards , which can use the NUM instruction to convert the words from decimal.

The format cannot be binary because cards or paper tape cannot represent all MIX words. This can then be assembled to the above mentioned executable formats. While assembly programs are often independent of the byte size, programs in the executable format work only for a specific byte size.

Extensions include: Floating point arithmetic operations. Floating-point numbers are a single word long. The floating-point format uses the byte size as the base, so the exponent shifts the value by an entire byte. Byte 1 of the word contains the biased exponent, bytes FCMP does tolerant comparison of rA with the memory word at address M, the tolerance is given by the word at address 0, output to the comparison flags. FLOT converts integer to floating point, in place in rA.

FIX converts floating point to integer, in place in rA, with the overflow flag set and an undefined output in rA on overflow.

An interrupt system for IO and timers, together with memory accessible only in system mode. Advanced indexing by values of the I field of instructions greater than 7. Attaching the rX register to the traffic lights at an intersections, as well as the overflow counter for a pedestrian crossing button.

There is also no paper tape in MIXPC unit 19 is only the typewriter , and there is the command for the operator but not the program to rewind the card reader. In addition there are four new devices: 32 Music : IOC will stop any sound that is currently playing. Only fields are used; any byte which is nonzero means light on, and zero means light off. If M is zero, use the time of day to seed. IN will read one word into memory; all five bytes including sign are randomized to valid values in a uniform way.

2N2907A PDF

Donald Knuth

CPU General The size of a MIX byte depends on the machine: a byte stores a natural number less than 64 on binary machines, on decimal machines, or any limit between 64 and in general. A machine word in MIX is an integer made of a sign and five bytes. The memory of a MIX computer holds words. Data and instructions are stored in the same memory. Since MIX is an old computer, there are no caches, all memory accesses take the same time. Of these, rA and rX are full words, but the index registers rI


MIX (Knuth)

His father had two jobs: running a small printing company and teaching bookkeeping at Milwaukee Lutheran High School. Although the judges only had 2, words on their list, Donald found 4, words, winning the contest. As prizes, the school received a new television and enough candy bars for all of his schoolmates to eat. While working on this project, Knuth decided that he could not adequately treat the topic without first developing a fundamental theory of computer programming, which became The Art of Computer Programming. He originally planned to publish this as a single book. As Knuth developed his outline for the book, he concluded that he required six volumes, and then seven, to thoroughly cover the subject.


MMIX Op Codes




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